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////////////////////////////////////////////////////////////////////
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// UtilCUDA.cpp
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//
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// Copyright 2007 cDc@seacave
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// Distributed under the Boost Software License, Version 1.0
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// (See http://www.boost.org/LICENSE_1_0.txt)
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#include "Common.h"
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#include "UtilCUDA.h"
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#ifdef _USE_CUDA
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// D E F I N E S ///////////////////////////////////////////////////
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namespace SEACAVE {
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namespace CUDA {
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// S T R U C T S ///////////////////////////////////////////////////
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int desiredDeviceID = -1;
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Devices devices;
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// GPU Architecture definitions
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int _convertSMVer2Cores(int major, int minor)
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{
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if (major == 9999 && minor == 9999)
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return 1;
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// Defines for GPU Architecture types (using the SM version to determine the # of cores per SM
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struct sSMtoCores {
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int SM; // 0xMm (hexadecimal notation), M = SM Major version, and m = SM minor version
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int Cores;
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};
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const sSMtoCores nGpuArchCoresPerSM[] = {
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{0x20, 32}, // Fermi Generation (SM 2.0) GF100 class
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{0x21, 48}, // Fermi Generation (SM 2.1) GF10x class
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{0x30, 192}, // Kepler Generation (SM 3.0) GK10x class
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{0x32, 192}, // Kepler Generation (SM 3.2) GK10x class
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{0x35, 192}, // Kepler Generation (SM 3.5) GK11x class
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{0x37, 192}, // Kepler Generation (SM 3.7) GK21x class
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{0x50, 128}, // Maxwell Generation (SM 5.0) GM10x class
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{0x52, 128}, // Maxwell Generation (SM 5.2) GM20x class
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{0x53, 128}, // Maxwell Generation (SM 5.3) GM20x class
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{0x60, 64 }, // Pascal Generation (SM 6.0) GP100 class
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{0x61, 128}, // Pascal Generation (SM 6.1) GP10x class
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{0x62, 128}, // Pascal Generation (SM 6.2) GP10x class
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{0x70, 64 }, // Volta Generation (SM 7.0) GV100 class
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{0x72, 64 }, // Volta Generation (SM 7.2) GV10B class
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{0x75, 64 }, // Turing Generation (SM 7.5) TU1xx class
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{0x80, 64 }, // Ampere Generation (SM 8.0) GA100 class
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{-1, -1}
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};
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int index(0);
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while (nGpuArchCoresPerSM[index].SM != -1) {
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if (nGpuArchCoresPerSM[index].SM == ((major << 4) + minor))
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return nGpuArchCoresPerSM[index].Cores;
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index++;
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}
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// If we don't find the values, we default use the previous one to run properly
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VERBOSE("MapSMtoCores for SM %d.%d is undefined; default to use %d cores/SM", major, minor, nGpuArchCoresPerSM[index-1].Cores);
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return nGpuArchCoresPerSM[index-1].Cores;
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}
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// checks that the given device ID is valid;
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// if successful returns the device info in the given structure
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CUresult _gpuCheckDeviceId(int devID, Device& device)
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{
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int device_count;
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checkCudaError(cuDeviceGetCount(&device_count));
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if (device_count == 0) {
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VERBOSE("CUDA error: no devices supporting CUDA");
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return CUDA_ERROR_NO_DEVICE;
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}
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if (devID < 0)
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devID = 0;
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if (devID >= device_count) {
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VERBOSE("CUDA error: device [%d] is not a valid GPU device (%d CUDA capable GPU device(s) detected)", devID, device_count);
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return CUDA_ERROR_INVALID_DEVICE;
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}
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checkCudaError(cuDeviceGetAttribute(&device.computeMode, CU_DEVICE_ATTRIBUTE_COMPUTE_MODE, devID));
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if (device.computeMode == CU_COMPUTEMODE_PROHIBITED) {
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VERBOSE("CUDA error: device is running in <Compute Mode Prohibited>");
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return CUDA_ERROR_PROFILER_DISABLED;
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}
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checkCudaError(cuDeviceComputeCapability(&device.major, &device.minor, devID));
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if (device.major < 1) {
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VERBOSE("CUDA error: GPU device does not support CUDA");
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return CUDA_ERROR_INVALID_DEVICE;
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}
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checkCudaError(cuDeviceGetProperties(&device.prop, devID));
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device.ID = (CUdevice)devID;
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return CUDA_SUCCESS;
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}
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// finds the best GPU (with maximum GFLOPS);
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// if successful returns the device info in the given structure
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CUresult _gpuGetMaxGflopsDeviceId(Device& bestDevice)
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{
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int device_count = 0;
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checkCudaError(cuDeviceGetCount(&device_count));
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if (device_count == 0) {
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VERBOSE("CUDA error: no devices supporting CUDA");
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return CUDA_ERROR_NO_DEVICE;
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}
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// Find the best major SM Architecture GPU device
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Devices devices;
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int best_SM_arch = 0;
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for (int current_device = 0; current_device < device_count; ++current_device) {
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Device device;
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if (reportCudaError(cuDeviceGetAttribute(&device.computeMode, CU_DEVICE_ATTRIBUTE_COMPUTE_MODE, current_device)) != CUDA_SUCCESS)
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continue;
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// If this GPU is not running on Compute Mode prohibited, then we can add it to the list
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if (device.computeMode == CU_COMPUTEMODE_PROHIBITED)
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continue;
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if (reportCudaError(cuDeviceComputeCapability(&device.major, &device.minor, current_device)) != CUDA_SUCCESS)
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continue;
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if (device.major > 0 && device.major < 9999) {
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best_SM_arch = MAXF(best_SM_arch, device.major);
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device.ID = (CUdevice)current_device;
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devices.Insert(device);
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}
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}
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if (devices.IsEmpty()) {
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VERBOSE("CUDA error: all devices have compute mode prohibited");
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return CUDA_ERROR_PROFILER_DISABLED;
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}
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// Find the best CUDA capable GPU device
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Device* max_perf_device = NULL;
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size_t max_compute_perf = 0;
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FOREACHPTR(pDevice, devices) {
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ASSERT(pDevice->computeMode != CU_COMPUTEMODE_PROHIBITED);
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int sm_per_multiproc = _convertSMVer2Cores(pDevice->major, pDevice->minor);
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int multiProcessorCount;
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if (reportCudaError(cuDeviceGetAttribute(&multiProcessorCount, CU_DEVICE_ATTRIBUTE_MULTIPROCESSOR_COUNT, (CUdevice)pDevice->ID)) != CUDA_SUCCESS)
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continue;
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int clockRate;
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if (reportCudaError(cuDeviceGetAttribute(&clockRate, CU_DEVICE_ATTRIBUTE_CLOCK_RATE, pDevice->ID)) != CUDA_SUCCESS)
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continue;
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size_t compute_perf = (size_t)multiProcessorCount * sm_per_multiproc * clockRate;
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if (compute_perf > max_compute_perf &&
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(best_SM_arch < 3 || // if we find GPU with SM major > 2, search only these
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pDevice->major == best_SM_arch) ) // if our device==dest_SM_arch, choose this, or else pass
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{
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max_compute_perf = compute_perf;
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max_perf_device = pDevice;
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}
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}
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if (max_perf_device == NULL)
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return CUDA_ERROR_INVALID_DEVICE;
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bestDevice = *max_perf_device;
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checkCudaError(cuDeviceGetProperties(&bestDevice.prop, bestDevice.ID));
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return CUDA_SUCCESS;
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}
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// initialize the given CUDA device and add it to the array of initialized devices;
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// if the given device is -1, the best available device is selected
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CUresult initDevice(int deviceID)
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{
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if (deviceID < -1)
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return CUDA_ERROR_INVALID_DEVICE;
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checkCudaError(cuInit(0));
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Device device;
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if (deviceID >= 0) {
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checkCudaError(_gpuCheckDeviceId(deviceID, device));
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} else {
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// Otherwise pick the device with the highest Gflops/s
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checkCudaError(_gpuGetMaxGflopsDeviceId(device));
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}
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if (device.major < 3) {
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VERBOSE("CUDA error: compute capability 3.2 or greater required (available %d.%d for device[%d])", device.ID, device.major, device.minor);
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return CUDA_ERROR_INVALID_DEVICE;
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}
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devices.Insert(device);
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checkCudaError(cuCtxCreate(&devices.Last().ctx, CU_CTX_SCHED_AUTO, device.ID));
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#if TD_VERBOSE != TD_VERBOSE_OFF
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char name[2048];
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checkCudaError(cuDeviceGetName(name, 2048, device.ID));
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size_t memSize;
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checkCudaError(cuDeviceTotalMem(&memSize, device.ID));
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DEBUG("CUDA device %d initialized: %s (compute capability %d.%d; memory %s)", device.ID, name, device.major, device.minor, Util::formatBytes(memSize).c_str());
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#endif
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return CUDA_SUCCESS;
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}
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// load/read module (program) from file/string and compile it
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CUresult ptxJIT(LPCSTR program, CUmodule& hModule, int mode)
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{
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CUlinkState lState;
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CUjit_option options[6];
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void *optionVals[6];
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float walltime(0);
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const unsigned logSize(8192);
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char error_log[logSize], info_log[logSize];
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void *cuOut;
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size_t outSize;
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// Setup linker options
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// Return walltime from JIT compilation
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options[0] = CU_JIT_WALL_TIME;
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optionVals[0] = (void*)&walltime;
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// Pass a buffer for info messages
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options[1] = CU_JIT_INFO_LOG_BUFFER;
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optionVals[1] = (void*)info_log;
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// Pass the size of the info buffer
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options[2] = CU_JIT_INFO_LOG_BUFFER_SIZE_BYTES;
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optionVals[2] = (void*)(long)logSize;
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// Pass a buffer for error message
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options[3] = CU_JIT_ERROR_LOG_BUFFER;
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optionVals[3] = (void*)error_log;
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// Pass the size of the error buffer
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options[4] = CU_JIT_ERROR_LOG_BUFFER_SIZE_BYTES;
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optionVals[4] = (void*)(long)logSize;
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// Make the linker verbose
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options[5] = CU_JIT_LOG_VERBOSE;
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optionVals[5] = (void*)1;
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// Create a pending linker invocation
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checkCudaError(cuLinkCreate(6, options, optionVals, &lState));
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const size_t programLen(strlen(program));
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CUresult myErr;
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if (mode == JIT::FILE || (mode == JIT::AUTO && programLen < 256)) {
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// Load the PTX from the file
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myErr = cuLinkAddFile(lState, CU_JIT_INPUT_PTX, program, 0, 0, 0);
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} else {
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// Load the PTX from the string
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myErr = cuLinkAddData(lState, CU_JIT_INPUT_PTX, (void*)program, programLen+1, 0, 0, 0, 0);
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}
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if (myErr != CUDA_SUCCESS) {
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// Errors will be put in error_log, per CU_JIT_ERROR_LOG_BUFFER option above
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VERBOSE("PTX Linker Error: %s", error_log);
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return myErr;
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}
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// Complete the linker step
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checkCudaError(cuLinkComplete(lState, &cuOut, &outSize));
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// Linker walltime and info_log were requested in options above
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DEBUG_LEVEL(3, "CUDA link completed (%gms):\n%s", walltime, info_log);
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// Load resulting cuBin into module
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checkCudaError(cuModuleLoadData(&hModule, cuOut));
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// Destroy the linker invocation
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return reportCudaError(cuLinkDestroy(lState));
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}
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// requested function (kernel) from module (program)
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CUresult ptxGetFunc(const CUmodule& hModule, LPCSTR functionName, CUfunction& hKernel)
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{
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// Locate the kernel entry point
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checkCudaError(cuModuleGetFunction(&hKernel, hModule, functionName));
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DEBUG_LEVEL(3, "Kernel '%s' loaded", functionName);
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return CUDA_SUCCESS;
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}
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/*----------------------------------------------------------------*/
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void MemDevice::Release() {
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if (pData) {
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reportCudaError(cuMemFree(pData));
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pData = 0;
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}
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}
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CUresult MemDevice::Reset(size_t size) {
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if (pData) {
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if (nSize == size)
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return CUDA_SUCCESS;
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Release();
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}
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if (cuMemAlloc(&pData, size) != CUDA_SUCCESS) {
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pData = 0;
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return CUDA_ERROR_OUT_OF_MEMORY;
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}
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nSize = size;
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return CUDA_SUCCESS;
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}
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CUresult MemDevice::Reset(const void* pDataHost, size_t size) {
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if (pData && nSize != size)
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Release();
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if (!pData && cuMemAlloc(&pData, size) != CUDA_SUCCESS) {
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pData = 0;
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return CUDA_ERROR_OUT_OF_MEMORY;
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}
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nSize = size;
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return cuMemcpyHtoD(pData, pDataHost, size);
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}
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CUresult MemDevice::SetData(const void* pDataHost, size_t size) {
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ASSERT(IsValid());
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return cuMemcpyHtoD(pData, pDataHost, size);
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}
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CUresult MemDevice::GetData(void* pDataHost, size_t size) const {
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ASSERT(IsValid());
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return cuMemcpyDtoH(pDataHost, pData, size);
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}
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/*----------------------------------------------------------------*/
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void EventRT::Release() {
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if (hEvent) {
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reportCudaError(cuEventDestroy(hEvent));
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hEvent = NULL;
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}
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}
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CUresult EventRT::Reset(unsigned flags) {
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CUresult ret(cuEventCreate(&hEvent, flags));
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if (ret != CUDA_SUCCESS)
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hEvent = NULL;
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return ret;
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}
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/*----------------------------------------------------------------*/
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void StreamRT::Release() {
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if (hStream) {
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reportCudaError(cuStreamDestroy(hStream));
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hStream = NULL;
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}
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}
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CUresult StreamRT::Reset(unsigned flags) {
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CUresult ret(cuStreamCreate(&hStream, flags));
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if (ret != CUDA_SUCCESS)
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hStream = NULL;
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return ret;
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}
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CUresult StreamRT::Wait(CUevent hEvent) {
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ASSERT(IsValid());
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return cuStreamWaitEvent(hStream, hEvent, 0);
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}
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/*----------------------------------------------------------------*/
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void ModuleRT::Release() {
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if (hModule) {
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reportCudaError(cuModuleUnload(hModule));
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hModule = NULL;
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}
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}
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CUresult ModuleRT::Reset(LPCSTR program, int mode) {
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// compile the module (program) from PTX and get its handle (Driver API)
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CUresult result(ptxJIT(program, hModule, mode));
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if (result != CUDA_SUCCESS)
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hModule = NULL;
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return result;
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}
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/*----------------------------------------------------------------*/
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void KernelRT::Release() {
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inDatas.Release();
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outDatas.Release();
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ptrModule.Release();
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hKernel = NULL;
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}
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void KernelRT::Reset() {
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paramOffset = 0;
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inDatas.Empty();
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outDatas.Empty();
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}
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CUresult KernelRT::Reset(LPCSTR functionName) {
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// get the function handle (Driver API)
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ASSERT(ptrModule != NULL && ptrModule->IsValid());
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CUresult result(ptxGetFunc(*ptrModule, functionName, hKernel));
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if (result != CUDA_SUCCESS) {
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ptrModule.Release();
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hKernel = NULL;
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}
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return result;
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}
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CUresult KernelRT::Reset(const ModuleRTPtr& _ptrModule, LPCSTR functionName) {
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// set module
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ptrModule = _ptrModule;
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// set function
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return Reset(functionName);
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}
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CUresult KernelRT::Reset(LPCSTR program, LPCSTR functionName, int mode) {
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// compile the module (program) from PTX and get the function handle (Driver API)
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ptrModule = new ModuleRT(program, mode);
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if (!ptrModule->IsValid()) {
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ptrModule.Release();
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hKernel = NULL;
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return CUDA_ERROR_INVALID_HANDLE;
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}
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return Reset(functionName);
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}
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// append a generic input parameter (allocate© input buffer)
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CUresult KernelRT::_AddParam(const InputParam& param) {
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MemDevice& data = inDatas.AddEmpty();
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if (data.Reset(param.data, param.size) != CUDA_SUCCESS)
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return CUDA_ERROR_OUT_OF_MEMORY;
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return addKernelParam(hKernel, paramOffset, (CUdeviceptr)data);
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}
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// append a generic output parameter (allocate output buffer)
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CUresult KernelRT::_AddParam(const OutputParam& param) {
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MemDevice& data = outDatas.AddEmpty();
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if (data.Reset(param.size) != CUDA_SUCCESS)
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return CUDA_ERROR_OUT_OF_MEMORY;
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return addKernelParam(hKernel, paramOffset, (CUdeviceptr)data);
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}
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// copy result from the given output parameter index back to the host
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CUresult KernelRT::GetResult(const CUdeviceptr data, const ReturnParam& param) const {
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return fetchMemDevice(param.data, param.size, data);
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}
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// read from the device the variadic output parameters
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CUresult KernelRT::GetResult(const std::initializer_list<ReturnParam>& params) const {
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MemDeviceArr::IDX idx(0);
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for (auto param : params)
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if (outDatas[idx++].GetData(param.data, param.size) != CUDA_SUCCESS)
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return CUDA_ERROR_INVALID_VALUE;
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return CUDA_SUCCESS;
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}
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/*----------------------------------------------------------------*/
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} // namespace CUDA
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} // namespace SEACAVE
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#endif // _USE_CUDA
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